The CBM92AD65 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The CBM92AD65 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range. The ADC features a wide bandwidth differential sample-andhold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the CBM92AD65 is suitable for applications in communications, instrumentation and medical imaging.A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to
maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.
The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic. Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional onchip dither function is available to improve SFDR performance with low power analog input signals. The CBM92AD65 is available in a Pb-free, 48-lead LFCSP and is speci fied over the industrial temperature range of −40°C to +85°C.
SNR = 79.0 dBFS at 70 MHz and 125 MSPS
SFDR = 93 dBc at 70 MHz and 125 MSPS
Low power: 373 mW at 125 MSPS
1.8 V analog supply operation
1.8 V CMOS or LVDS output supply
Integer 1-to-8 input clock divider
IF sampling frequencies to 300 MHz
−154.3 dBm/Hz small signal input noise with 200 Ω input impedance at 70 MHz and 125 MSPS
Optional on-chip dither
Programmable internal ADC voltage reference
Integrated ADC sample-and-hold inputs
Flexible analog input range: 1 V p-p to 2 V p-p
Differential analog inputs with 650 MHz bandwidth
ADC clock duty cycle stabilizer
Serial port control
User-configurable, built-in self-test (BIST) capability
Energy-saving power-down modes
Communications
Multimode digital receivers (3G)
GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA
Smart antenna systems
General-purpose software radios
Broadband data applications
Ultrasound equipment
Type | Title | File Size | Date | Download |
Selection Guide | Corebai Selection Guide Rev.En2023.pdf | 7.73M | 2024-01-24 | Download |
计算工具
ANALOG-ENGINEER-CALC — 模拟工程师计算器
模拟工程师计算器旨在加快模拟电路设计工程师经常使用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算的列表(从使用反馈电阻器设置运算放大器增益 到为稳定模数转换器 (ADC) 驱动器缓冲器电路选择合适的电路设计元件)。除了可用作单独的工具之外,该计算器还能够很好地与模拟工程师口袋参考书中所述的概念配合使用。
计算工具
ANALOG-ENGINEER-CALC — 模拟工程师计算器
模拟工程师计算器旨在加快模拟电路设计工程师经常使用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算的列表(从使用反馈电阻器设置运算放大器增益 到为稳定模数转换器 (ADC) 驱动器缓冲器电路选择合适的电路设计元件)。除了可用作单独的工具之外,该计算器还能够很好地与模拟工程师口袋参考书中所述的概念配合使用。
Product number | Rating | Inventory(pcs) | Price | Package | MSL | RoHS | MPQ | Operating Temperature Range (℃) | Order |
CBM92AD65-125 | Industrial grade | 0 | QFN-48 | MSL 3 | RoHS | Tray, 260 | -40 to 85 | ||
CBM92AD65-105 | Industrial grade | 0 | QFN-48 | MSL 3 | RoHS | Tray, 260 | -40 to 85 | ||
CBM92AD65-80 | Industrial grade | 0 | QFN-48 | MSL 3 | RoHS | Tray, 260 | -40 to 85 |
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