The CBM96AD56-125 is a quad, 16-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample and hold circuit designed for low cost, low power, small size, and ease of use. The device operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. An external reference or driver components are not required for many applications. Individual channel power-down is supported and typically consumes less than 14 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility andminimize system cost, such as a programmable output clock, data alignment, and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
SNR:79dBFS (9.7MHz, VREF=1.4V)
SNR:77dBFs (9.7MHz, VREF=1.0V)
SFDR:85dBc to Nyqulst(VREF=1.4V)
SFDR:91dBc to Nyqulst(VREF=1.0V)
JESD204B Subclass 1 coded serial digital outputs
Flexible analog input range: 2.0 V p-p to 2.8 V p-p
1.8 V supply operation
Low power: 195 mW per channel at 125 MSPS (two lanes)
DNL = ±0.6 LSB (VREF = 1.4 V)
INL = ±5.0 LSB (VREF = 1.4 V)
650 MHz analog input bandwidth, full power
Serial port control
Full chip and individual channel power-down modes
Built-in and custom digital test pattern generation
Multichip sync and clock divider
Standby mode
High speed imaging
Quadrature radio receivers
Diversity radio receivers
Portable test equipment
Type | Title | File Size | Date | Download |
Product manual | CBM96AD56-125 | 2831KB | 2024-11-27 | Download |
Selection Guide | Corebai Selection Guide Rev.En2023.pdf | 7.73M | 2024-01-24 | Download |
计算工具
ANALOG-ENGINEER-CALC — 模拟工程师计算器
模拟工程师计算器旨在加快模拟电路设计工程师经常使用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算的列表(从使用反馈电阻器设置运算放大器增益 到为稳定模数转换器 (ADC) 驱动器缓冲器电路选择合适的电路设计元件)。除了可用作单独的工具之外,该计算器还能够很好地与模拟工程师口袋参考书中所述的概念配合使用。
计算工具
ANALOG-ENGINEER-CALC — 模拟工程师计算器
模拟工程师计算器旨在加快模拟电路设计工程师经常使用的许多重复性计算。该基于 PC 的工具提供图形界面,其中显示各种常见计算的列表(从使用反馈电阻器设置运算放大器增益 到为稳定模数转换器 (ADC) 驱动器缓冲器电路选择合适的电路设计元件)。除了可用作单独的工具之外,该计算器还能够很好地与模拟工程师口袋参考书中所述的概念配合使用。
Product number | Rating | Inventory(pcs) | Price | Package | MSL | RoHS | MPQ | Operating Temperature Range (℃) | Order |
CBM96AD56-125 | Industrial grade | 800 |
1~9 | $ 309.10
|
QFN-56 | MSL 3 | RoHS | Tray, 260 | -40 - 85 |
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